ウィーン工科大学 Erich Gornik 教授講演会

日時 2018年7月30日(月) 13:30〜15:30
場所 大阪大学・吹田キャンパス 電気系E3棟2階 会議室B E3-215

Erich Gornik, "Sensing with Quantum Cascade Laser and Detector Systems"

Erich Gornik

Optical sensors for mid-infrared spectroscopy are widely used in industrial and environmental monitoring as well as medical and biochemical diagnostics. A sensor concept, based on a bi-functional quantum cascade heterostructure, for which the differentiation between laser and detector is eliminated, enables mutual commutation of laser and detector, simplifies remote sensing setups and facilitates a crucial miniaturization of sensing devices.

Liquid sensing utilizing bi-functional quantum cascade lasers/detectors (QCLDs) can be realized on a single chip. A QCL active region design with an additional detection capability at the laser emission wavelength allows a straightforward integration, where different parts of the chip are used for lasers and others for detectors. The performance of such bi-functional designs has been optimized to reach a similar laser performance as conventional QCLs, allowing for high duty cycle operation at room temperature.

Typical analyte interaction lengths for gas sensing are in the range of tens of centimeters or more and exceed the common semiconductor chip sizes. Our gas sensing approach incorporates surface-active lasers and detectors. The latest demonstrator consists of two concentric ring QCLDs with second order distributed feedback (DFB) gratings on top of the waveguides. These DFB gratings facilitate vertical light emission and detection in the biased lasing and unbiased detector configuration, respectively. The two rings emit at two different wavelengths, which provides room temperature lasing and detection of two wavelengths monolithically integrated on the same chip.


Erich Gornik received his Ph.D. degree in Physics in 1972. He was a Postdoctoral Fellow at Bell Laboratories, Holmdel, USA, from 1975 to1977. In 1979, he has been appointed Professor for Experimental Physics at the University of Innsbruck. In 1988, he became Professor for Semiconductor Physics and Director at the Walter Schottky Institute of the Technical University Munich. From 1993 until 2012, he was Full Professor for Semiconductor Electronics and Director of the Micro-and Nanostructure Center (ZMNS) at the Technical University of Vienna and since then he is emeritus Professor. From 2003 to 2008 he was managing director of the Austrian Research Centers.

He has spent several Research Professorships at numerous international research institutions and has received various awards; among others, he is Fellow of the American Physical Society since 1995. In 1997 he received the “Wittgenstein Preis” of the Austrian Government and in 2000 the “Erwin Schrödinger Preis” of the Austrian Academy of Science. He has supervised more than 150 Master and PhD students. Further achievements are 540-refereed publications, 90 invited and plenary lectures at international conferences.

インド工科大学 Nihar Ranjan Mohapatra 教授・Mohit D Ganeriwala 博士講演会

日時 2018年6月11日(月) 14:40〜16:10
場所 大阪大学・吹田キャンパス 電気系E3棟2階 会議室B E3-215

Nihar Ranjan Mohapatra, "An Accurate and Efficient Compact Model for Trap-Assisted Carrier Transport through Multi-stack Gate Dielectrics of HKMG nMOS Transistors"

Nihar Ranjan Mohapatra
Modern gate stacks in MOS transistors or Semiconductor Memories comprises of transition metal oxides (HfO2 or ZrO2) on top of a low permittivity SiO2 or SiON. The transition metal oxide films have large amounts of positively charged oxygen vacancies which gives rise to trap states below the conduction band edges. These trap states lead to the increased trap assisted conduction of carriers through the gate dielectrics. The trap assisted conduction in a dielectric has two components: (a) Trap Assisted Tunneling (TAT) and (b) Poole-Frenkel (PF) conduction. The relative contribution of TAT or PF conduction to the gate current depends on the factors like density of traps, position of traps relative to the conduction band of the dielectric and the tunneling barrier. In this talk, I will discuss in detail the carrier transport through the gate stack of HKMG MOS transistors. A compact model suitable for describing the carrier transport in multi stack gate dielectrics will be presented. The talk will illustrate novel contributions like, (a) a correction factor for the WKB approximation, (b) a simple expression for inelastic TAT, (c) a unified expression for both TAT and PF conduction and (d) a TAT formulation with two trap levels.

Mohit D. Ganeriwala, "Compact Modelling Solutions for III-V Multi-Gate Devices"

Mohit D. Ganeriwala
The researchers in semiconductor industries, research organizations and academia are currently exploring new semiconductor materials along with different device architectures to enable transistor scaling for low power and high performance CMOS circuits. One of the promising options is the multi-gate device architecture with III-V and 2D layered semiconductor materials. There have been studies in last few years on III-V devices, mostly related to their fabrication and process integration capabilities. However the research related to behavior of these devices when used in CMOS circuits is mostly limited due to unavailability of suitable compact models for circuit simulators. Further, there are several anomalous behaviors, exhibited by multi-gate III-V transistors due to low effective mass channel material and high quantum confinement which are not considered in the current industry standard models. This talk will discuss some of the compact models developed in our group for III-V double gate and GAA transistors. Our model captures the essential physics by including the sub-band energy levels, 2D or 1D DOS and exact Fermi-Dirac statistics. The model equations are explicit in nature which makes them computationally efficient and suitable for circuit simulators.

応用物理学会関西支部セミナー

日時 2017年3月2日(木) 13:00〜14:50
場所 大阪大学・吹田キャンパス 電気系E3棟2階 会議室B E3-215
主催 応用物理学会関西支部

プログラム
13:00〜13:20 入沢 寿史(産業技術総合研究所)
「遷移金属ダイカルコゲナイド系原子層半導体デバイスの研究動向と課題」
13:20〜13:40 森 伸也,黒田 龍哉(大阪大学)
「遷移金属ダイカルコゲナイドヘテロ接合におけるバンド間トンネル電流」
13:40〜14:00 福田 浩一(産業技術総合研究所)
「平行電界型トンネルFETのモデリング」
ー 休憩 (10分) ー
14:10〜14:30 服部 淳一(産業技術総合研究所)
「強誘電体負性容量トランジスタのシミュレーション」
14:30〜14:50 浅井 栄大(産業技術総合研究所)
「Landau-Khalatnikov理論に基づくFeFETのコンパクトモデル」
参加費 無料
申込先 森 伸也 (阪大工)
nobuya.mori(at)eei.eng.osaka-u.ac.jp
氏名,所属を明記の上,電子メールにてお申込み下さい.

過去の関西支部セミナー

英国 Nottingham 大学 Amalia Patanè 教授講演会

日時 2016年12月14日(水) 15:30〜16:30
場所 大阪大学・吹田キャンパス 電気系E3棟2階 会議室B E3-215

Amalia Patanè, "Novel two-dimensional Van der Waals crystals and heterostructures"

Amalia Patane
The development of van der Waals (vdW) heterostructures made by stacking two dimensional (2D) crystals has led to the discovery of fundamental physical phenomena and to the realization of 2D functional devices ranging from sensitive phototransistors to tunnel diodes. The electronic properties of these devices can be modified not only by careful selection of the materials within the stack, but also by adjusting the built-in strain and relative orientation of the component crystalline layers. Among the vdW crystals, the metal chalcogenide InSe compound represents an exfoliable and stable semiconductor that expands the current library of vdW crystals. In this talk I will review the research at Nottingham on this new class of 2D layered compounds. From the growth and fabrication of vdW heterostructures to the demonstration of prototype graphene/InSe devices, I will discuss how these layers can provide a platform for scientific investigations and new routes to 2D electronics and optoelectronics [1-2].

[1] Mudd, G.W. et al., Adv. Materials 27, 3760 (2015).
[2] Bandurin, D. A. et al., Nature Nanotechnology (2016).

立命館大学藤野研究室・大阪大学森研究室交流会

日時 2016年6月28日(火) 15:00〜18:00
場所 大阪大学・吹田キャンパス 電気系E3棟2階 会議室C E3-216

プログラム
15:00〜15:05 藤野  毅 「藤野研究室の紹介」
15:05〜15:10 森  伸也 「森研究室の紹介」
15:10〜15:30 白畑 正芳 「センサノードGSSEの研究」
15:30〜15:50 井上 泰佑 「アナログ集積回路の研究」
15:50〜16:10 汐崎  充 「車載システムのセキュリティに関する研究」
16:10〜16:30 藤田 流星 「パワーデバイス用SiCのシミュレーション」
ー 休憩 (10分) ー
16:40〜17:00 田中 将貴 「ICカードを用いた公開鍵暗号に対するサイドチャネル攻撃」
17:00〜17:20 南谷 夏海 「イメージセンサのシミュレーション」
17:20〜17:40 名倉 優輝 「CMOSイメージセンサの製造ばらつきを用いたPUF技術の基本検討」
17:40〜18:00 小池 慎治 「モンテカルロ法による半導体中の熱電特性解析」

GSSE: Green Smart Secure Eyes, PUF: Physical Unclonable Function

応用物理学会関西支部セミナー

日時 2016年1月29日(金) 14:30〜16:30
場所 大阪大学・吹田キャンパス 電気系E3棟2階 会議室B E3-215
主催 応用物理学会関西支部

プログラム
14:30〜14:50 西村  正(大阪大学)
「ワイドギャップ半導体パワーデバイスとシミュレーション技術」
14:50〜15:40 児玉 和樹(福井大学)
「窒化物半導体電子デバイスの研究開発に向けたシミュレーションの利用」
15:40〜16:30 上野 弘明(パナソニック)
「ノーマリオフGaNトランジスタの開発とパワエレ統合設計に向けたその動的挙動モデル」
参加費 無料
申込先 森 伸也 (阪大工)
nobuya.mori(at)eei.eng.osaka-u.ac.jp
氏名,所属を明記の上,電子メールにてお申込み下さい.

過去の関西支部セミナー

東北大学 Philippe Gaubert 博士講演会

日時 2015年11月4日(水) 16:20〜17:20
場所 大阪大学・吹田キャンパス 電気系E3棟2階 会議室C E3-216

Philippe Gaubert, "High performance and low noise metal-oxide-semiconductor field-effect transistors"

Philippe Gaubert
The low frequency noise in metal-oxide-semiconductor field-effect transistors also known as Flicker or even 1/f noise is recently gaining interest among the microelectronic manufacturers. Indeed, it is up converted in phase noise at high frequency and therefore it is becoming a strong limiting factor of performance since the devices are severely scaled down, thus the interest to reduce it to catch up with the semiconductor roadmap. Besides, the study of the low frequency noise can provide precious information regarding for example the fabrication process or the quality of a MOSFET. Consequently, in addition to provide the noise performance of a given technology, its study in the case of newly developed devices ultimately aimed at replacing the present CMOS technology is of interest not only to investigate the source of the low frequency noise but also to optimize a fabrication process or even investigate the conduction mechanism. The present seminar will fall within this scope and will be organized into 3 main sections.

The first section will analyze the reduction of the low frequency noise in MOSFETs. Indeed, the implementation of a new salicide structure for the source and drain contacts resulted in a 2 decades reduction of the low frequency noise. In addition, it has been revealed that a further reduction can be expected by using a newly developed plasma process for the fabrication of the gate oxide.

The second section will assess the performances and especially the noise one of a newly developed MOSFET working on accumulation mode rather than on the conventional inversion one. In addition to feature a higher drivability and a better reliability than the conventional MOSFETs, these new devices exhibit a lower low frequency noise level, making them a very serious replacement for the future CMOS technology.

The third section will present the 1/f noise study in MOSFETs at high drain current. As a matter of fact, within this region, parasitic noise such as the one coming from the access series resistances are covering up the 1/f noise stemming from the channel of the MOSFETs, preventing us to study it. However, on account of a newly developed process and of a new orientation of the silicon, its investigation at high drain current has been made possible. This revealed that both noise sources, the traps located at the Si/SiO2 interface and the fundamental fluctuation of the mobility are generating the 1/f noise at the same time. These results arisen new questions about the induced mobility fluctuations of the correlated number and mobility fluctuation theory.

英国 Nottingham 大学 Patanè 教授・Greenaway 博士講演会

日時 2015年7月24日(金) 14:30〜16:30
場所 大阪大学・吹田キャンパス 電気系E3棟2階 会議室B E3-215

Amalia Patanè, "New routes to two-dimensional science and technologies"

Amalia Patane
The development of van der Waals structures made by stacking two-dimensional (2D) crystals has led to the discovery of physical phenomena of fundamental and technological interest. This seminar will review my research at Nottingham on a new class of 2D metal chalcogenide layered compounds suitable for versatile band-gap engineering. From the growth and fabrication of new structures to the demonstration of prototype devices, I will discuss how these layers can provide a platform for scientific investigations and new routes to 2D electronics and optoelectronics.

Mark Greenaway, "Resonant tunnelling of Dirac-Weyl Fermions in twisted graphene-hBN transistors"

Mark Greenaway
Multilayer transistors based on graphene and other van der Waals crystals exhibit interesting physical properties, high on-off current switching ratios, mechanical flexibility and resonant tunnelling with gate voltage-tuneable negative differential conductance at room temperature. In these devices, we have recently demonstrated the strong sensitivity of in-plane momentum conserving tunnel transitions to any small misalignment or twist angle between the crystalline lattices of the two graphene electrodes. Following a review of this recent work, we will present new results which investigate the effect of a magnetic field applied perpendicular to the graphene layers on the current-voltage characteristics. Tunnelling of electrons between the Landau levels of the two graphene electrodes gives rise to a complex pattern of sharp resonant peaks in the differential conductance. We demonstrate how the intensity of the energy- and momentum- conserving tunnel transitions reveal the effects of chirality and “Klein paradox” tunnelling, which are unique features of electron dynamics in graphene and related materials.